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Understanding the Energy Consumption of Dynamic Random Access Memories
Energy consumption has become a major constraint on the capabilities of computer systems. In large systems the energy consumed by Dynamic Random Access Memories (DRAM) is a significant part of the total energy consumption. It is possible...
Understanding the Energy Consumption of Dynamic Random Access Memories

Understanding the Energy Consumption of Dynamic Random Access Memories
Energy consumption has become a major constraint on the capabilities of computer systems. In large systems the energy consumed by Dynamic Random Access Memories (DRAM) is a significant part of the total energy consumption. It is possible...
Understanding the Energy Consumption of Dynamic Random Access Memories

Terabyte Bandwidth Initiative Demo
Rambus Senior Engineering Manager Arun Vaidyanath demonstrates the latest Rambus test chip running in 3 modes: high-speed differential, GDDR5, and DDR3. Groundbreaking memory technologies developed by Rambus enable signaling at 20...
Terabyte Bandwidth Initiative Demo

DRAM Power Model
...DRAM Power Model In order to proceed, please read and acknowledge the following disclaimers: White Paper Disclaimer: Copyright © 2010 Rambus Inc. All Rights Reserved. The information contained in this document reflects Rambus...
 

A Company of Inventors
Join us for an inspirational look at Rambus' 20-year commitment to innovation. Featuring Mike Farmwald and Mark Horowitz, Rambus founders, and former CEO Harold Hughes.
A Company of Inventors

Rambus Community Partnerships - Rebuilding Together
Every year Rambus employees are given the opportunity to join thousands of volunteers across the country to participate in National Rebuilding Day. Rebuilding Together matches families in need with groups of volunteers to repair and...
Rambus Community Partnerships - Rebuilding Together

A 5Gb/s Link with Clock Edge Matching and Embedded Common Mode Clock for ...
A 5Gb/s signaling system was designed and fabricated in TSMC’s 40nm LP CMOS process. A new clock/data skew minimization technique with a source-synchronous transmit clock delay line and integrating receiver tolerates high frequency ...
A 5Gb/s Link with Clock Edge Matching and Embedded Common Mode Clock for ...

Overcoming the Full Well Capacity Limit: High Dynamic Range Imaging Using ...
We describe a high dynamic range image sensor that oversamples the incident light in time by using the ADC output at each sampling as part of the final response and resetting the pixel only if a threshold has been exceeded. We show that ...
Overcoming the Full Well Capacity Limit: High Dynamic Range Imaging Using ...

Challenges and Solutions for Future Main Memory
DDR3 SDRAM is being used in many computing systems today and offers data rates of up to 1600Mbps. To achieve performance levels beyond DDR3, future main memory subsystems must attain faster data rates while maintaining low power, access ...
Challenges and Solutions for Future Main Memory

Mobile XDR™ Video Presentation
The Mobile XDR™ memory architecture is the world's fastest and most power-efficient memory for mobile applications. Capable of achieving data rates of 3.2 to 4.3 Gigabits per second (Gbps) per pin at an unprecedented power efficiency of ...
Mobile XDR™ Video Presentation

The Next Generation of Mobile Memory
Visit Denali's website to hear Judy Chen's MemCon 2008 presentation, The Next Generation of Mobile Memory.
The Next Generation of Mobile Memory

Memory System Challenges in the Multi-Core Era
Visit Denali's website to hear Stephen Woo's MemCon 2008 presentation, Memory System Challenges in the Multi-Core Era.
Memory System Challenges in the Multi-Core Era

Memory Technology Innovations for Mobile Platforms
Visit Denali's website to hear Fred Ware's MemCon 2009 presentation, Memory Technology Innovations for Mobile Platforms.
Memory Technology Innovations for Mobile Platforms

Rambus Community Partnerships - Botball Educational Robotics
Rambus supports the KISS Institute's Botball Educational Robotics Program which engages middle and high school aged students in a team-oriented robotics competition based on national science education standards.
Rambus Community Partnerships - Botball Educational Robotics

Accurate System Voltage and Timing Margin Simulation in High-Speed I/O ...
This paper appears in the November 2008 issue of "IEEE Transactions on Advanced Packaging" and is available for purchase on the IEEE website.
Accurate System Voltage and Timing Margin Simulation in High-Speed I/O ...

Market Trends Shaping the Memory Industry
Rising design costs and complexity, shorter design cycles, and rapidly evolving system needs are shaping the semiconductor and memory markets. Responding to these challenges will require extending the current memory roadmap as well as...
Market Trends Shaping the Memory Industry